projects/ janelia/ Mouse Joystick/

motor_encoder_switch

Subsystem sheet /motor_encoder_switch of mouse-joystick-pcb, from the library recipe orb_weaver:motor_encoder_switch (design_subsystems/motor_encoder_switch/motor_encoder_switch.subsystem.yaml).

Motor, encoder and limit-switch subsystem: a TMC5130 stepper driver with its SPI bus, diagnostics and driver enable tapped for the instrument port, a 5 V quadrature encoder input, a debounced limit-switch input and a DAC80501 analog angle output, with the motor and encoder terminal blocks, the BNC for the analog output and the 10 k pulls on the SPI lines, the diagnostics and the driver enable. The first library recipe (PLANS 2026-09-30 step 4d, D27), derived from the mouse board.

Board note: board-authored sheet, 10 parts

Notes

• The SPI pulls (SCK, COPI, CIPO to GND; ~{TMC_CS}, ~{DRV_EN}, DIAG0, DIAG1 to +3.3V) are the subsystem's, not the driver block's. They bias nets the board drives, so a second driver on the same bus would not double them (layout conventions, convention 10).
• The instrument taps of the driver's own signals (~{CS}_INST, ~{DRV_EN}_INST, the DIAG taps) come from inside the driver block (convention 14). The shared SPI lines' taps (SCK, COPI and CIPO _INST) sit inside the retired block the mouse board carries and move out when the block is next revised (PLANS, owed to boards).

Ports

The recipe's ports as the sheet symbol carries them, the root label each meets, and the net's class, MCU pin and meaning.

Port	Shape		Wired to	Net	Class	GPIO	Meaning
+3.3V	passive	shared	+3.3V_SW	/+3.3V_SW	PWR_3V3
+5V	passive	shared	+5V_SW	/+5V_SW	PWR_5V
ANGLE_OUT_MON	output		ANGLE_OUT_MON	/ANGLE_OUT_MON	MCU_FINE	GP29	Analog output readback, ADC3¹¹; in as the MCU sees it
DAC_SCL	input	shared	DAC_SCL	/DAC_SCL	Default	GP17	I2C0 SCL — same bus⁷; out as the MCU sees it, via the bus switch
DAC_SDA	bidirectional	shared	DAC_SDA	/DAC_SDA	Default	GP16	I2C0 SDA — analog 0x48, brake 0x49⁷; bidi as the MCU sees it, via the bus switch
DIAG0	output		TMC_DIAG0	/TMC_DIAG0	Default	GP5	Driver diagnostic 0; in as the MCU sees it, via the bus switch
DIAG0_INST	output		TMC_DIAG0_INST	/TMC_DIAG0_INST	INSTRUMENT
DIAG1	output		TMC_DIAG1	/TMC_DIAG1	Default	GP8	Driver diagnostic 1; in as the MCU sees it, via the bus switch
DIAG1_INST	output		TMC_DIAG1_INST	/TMC_DIAG1_INST	INSTRUMENT
ENCA_INST	output		ENCA_INST	/ENCA_INST	INSTRUMENT
ENCB_INST	output		ENCB_INST	/ENCB_INST	INSTRUMENT
GND	passive	shared	GND	/GND	PWR_RETURN_LOCAL
LIMIT_SW_INST	output		LIMIT_SW_INST	/LIMIT_SW_INST	INSTRUMENT
TMC_SPI_CIPO	output		TMC_SPI_CIPO	/TMC_SPI_CIPO	Default	GP4	Driver SPI CIPO (SPI0 RX); in as the MCU sees it, via the bus switch
TMC_SPI_CIPO_INST	output		TMC_SPI_CIPO_INST	/TMC_SPI_CIPO_INST	INSTRUMENT
TMC_SPI_COPI	output		TMC_SPI_COPI	/TMC_SPI_COPI	Default	GP7	Driver SPI COPI (SPI0 TX); out as the MCU sees it, via the bus switch
TMC_SPI_COPI_INST	output		TMC_SPI_COPI_INST	/TMC_SPI_COPI_INST	INSTRUMENT
TMC_SPI_SCK	output		TMC_SPI_SCK	/TMC_SPI_SCK	Default	GP6	Driver SPI clock (SPI0 SCK); out as the MCU sees it, via the bus switch
TMC_SPI_SCK_INST	output		TMC_SPI_SCK_INST	/TMC_SPI_SCK_INST	INSTRUMENT
VM	passive	shared	+36V_SW	/+36V_SW	PWR_HV_BUS
~{DRV_EN}	input		~{TMC_DRV_EN}	/~{TMC_DRV_EN}	Default	GP3	Driver enable, active low; out as the MCU sees it, via the bus switch
~{DRV_EN}_INST	output		~{TMC_DRV_EN}_INST	/~{TMC_DRV_EN}_INST	INSTRUMENT
~{TMC_CS}	output		~{TMC_CS}	/~{TMC_CS}	Default	GP2	Driver chip select; out as the MCU sees it, via the bus switch
~{TMC_CS}_INST	output		~{TMC_CS}_INST	/~{TMC_CS}_INST	INSTRUMENT

Blocks

The recipe's roles and the placements that fill them on this board.

Role	Instance	Block	Lifecycle	Summary
analog_output	analog_output_0_3v3_dac80501	orb_weaver_private:analog_output_0_3v3_dac80501	routed	Single-channel buffered 0-1.650 V precision analog voltage output, safe on a Neuropixels OneBox ADC channel or an unprotected 3.3 V MCU pin: a DAC80501ZDGSR at 3.3 V on I2C at address 0x48 on its internal 2.5 V reference, a 2-pole 987 Hz Sallen-Key reconstruction filter, an OPA197 on a ferrite-filtered 5 V rail at a non-inverting DC gain of 1.32 that is also the filter's active element, a /2 output divider, a 249 ohm series output resistor, an ESD clamp and a separately isolated monitor tap.
encoder_input	quadrature_encoder_input_5v_sn74lvc2g17	orb_weaver_private:quadrature_encoder_input_5v_sn74lvc2g17	routed	Single-ended 5 V quadrature encoder input: per-channel series/RC conditioning plus an SN74LVC2G17 dual Schmitt-trigger buffer that translates an encoder's 5 V push-pull A/B outputs into clean 3.3 V logic.
limit_switch	limit_switch_debounced_input_vertical	orb_weaver_private:limit_switch_debounced_input_vertical	routed	Debounced limit-switch input with its own 2-position 3.5 mm VERTICAL, top-entry pluggable screw terminal — Phoenix MCV 1,5/2-G-3,5, OW-CONN-TBH-1X02-3P5-VERT, on the local orb_weaver_tht copy of the MCV footprint — plus a MAX6816 single switch debouncer and local Vcc decoupling.
driver	tmc5130	orb_weaver_tmc5130:tmc5130_spi_r150	routed	TMC5130A motion-controller core with paired external current-sense resistors

Glue

The subsystem's own parts and nets, drawn by the board around the blocks.

References	Part	Value	Role
J1101	OW-CONN-HL-BNC-KHDA	Conn_Coaxial_HL-BNC-KHDA	analog output BNC
J1102	OW-CONN-TBH-1X04-3P5-VERT	TBH-1x04-3.5mm	motor terminal block (OB2, OB1, OA2, OA1)
J1103	OW-CONN-TBH-1X05-3P5-VERT	TBH-1x05-3.5mm	encoder terminal block (GND, n.c., A, +5V, B)
R1101, R1102, R1103, R1104, R1105, R1106, R1107	OW-RES-10K-0402	10k	pullup-pulldown

Net	Kind	Pins	Meaning
+3.3V	port	R1101.1, R1102.1, R1103.1, R1107.1
+5V	port	J1103.4
DIAG0	port	R1101.2
DIAG1	port	R1102.2
GND	port	J1101.2, J1103.1, R1104.2, R1105.2, R1106.2
TMC_SPI_CIPO	port	R1106.1
TMC_SPI_COPI	port	R1105.1
TMC_SPI_SCK	port	R1104.1
~{DRV_EN}	port	R1103.2
~{TMC_CS}	port	R1107.2
ANGLE_OUT	label	J1101.1
ENCA_5V	label	J1103.3
ENCB_5V	label	J1103.5
OA1	label	J1102.4
OA2	label	J1102.3
OB1	label	J1102.2
OB2	label	J1102.1