mcu¶
Subsystem sheet /mcu of mouse-joystick-pcb, from the board recipe subsystems/mcu.subsystem.yaml.
The controller: an RP2040 with its 29 GPIO behind SN74CB3Q3245 bus switches and its own 3.3 V regulator, plus the board's parts that define the switched bus at reset, sense the switched rail and tap the DAC I2C pair for the instrument port.
Board note: board-authored sheet, 11 parts
Notes¶
- Every GPIO leaves the block either switched (ISOn, through the bus switch the MCU enables on GP9) or raw (GPIOn, bypassing it); the rule is the powered domain of the far end, so the pyControl UART, the firmware markers, the 36 V control and the ADC readbacks bypass, and the TMC, torque and DAC buses switch.
- The pulls here are the board's because they bias nets the board drives (layout convention 10): R401 holds PYC_UART_RX high while the host is absent; R402 and R403 (4.7 k to +3.3V_MCU) hold the raw-side I2C pair (DAC_SCL_BYP, DAC_SDA_BYP) idle while the bus switch is open, R406 and R407 (4.7 k to +3.3V_SW) are the switched side's working pull-ups; R404 and R405 hold FW_TRIG0 and FW_TRIG1 low until firmware drives them.
- R408 and R409 (1 k each) divide +3.3V_SW to SW_RAIL_SENSE_DIV_2 on GP26 (ADC0), so firmware can tell whether the switched rail is up before it enables the bus switch; the raw rail enters the sheet as SW_RAIL_SENSE and never reaches a GPIO.
- R410 and R411 (100 ohm) tap DAC_SCL and DAC_SDA to DAC_SCL_INST and DAC_SDA_INST for the instrument port: the shared I2C lines are tapped once, by the board (convention 14).
- +5V_MCU carries a PWR_FLAG here because no power-output pin drives it in this sheet; the 5 V regulator is a root block.
Ports¶
The recipe's ports as the sheet symbol carries them, the root label each meets, and the net's class, MCU pin and meaning.
| Port | Shape | Wired to | Net | Class | GPIO | Meaning | |
|---|---|---|---|---|---|---|---|
+3.3V_MCU |
passive | shared | +3.3V_MCU |
/+3.3V_MCU |
PWR_3V3 | ||
+3.3V_SW |
passive | shared | +3.3V_SW |
/+3.3V_SW |
PWR_3V3 | ||
+5V_MCU |
passive | shared | +5V_MCU |
/+5V_MCU |
PWR_5V | ||
ANGLE_OUT_MON |
input | ANGLE_OUT_MON |
/ANGLE_OUT_MON |
MCU_FINE | GP29 |
Analog output readback, ADC3¹¹; in as the MCU sees it | |
BRAKE_ISENSE |
input | BRAKE_ISENSE |
/BRAKE_ISENSE |
MCU_FINE | GP27 |
Brake sink current readback, ADC1¹¹; in as the MCU sees it | |
DAC_SCL |
output | DAC_SCL |
/DAC_SCL |
Default | GP17 |
I2C0 SCL — same bus⁷; out as the MCU sees it, via the bus switch | |
DAC_SCL_INST |
output | DAC_SCL_INST |
/DAC_SCL_INST |
INSTRUMENT | |||
DAC_SDA |
bidirectional | DAC_SDA |
/DAC_SDA |
Default | GP16 |
I2C0 SDA — analog 0x48, brake 0x49⁷; bidi as the MCU sees it, via the bus switch | |
DAC_SDA_INST |
output | DAC_SDA_INST |
/DAC_SDA_INST |
INSTRUMENT | |||
FW_TRIG0 |
output | FW_TRIG0 |
/FW_TRIG0 |
MCU_FINE | GP25 |
Firmware timing marker; out as the MCU sees it | |
FW_TRIG1 |
output | FW_TRIG1 |
/FW_TRIG1 |
MCU_FINE | GP21 |
Firmware timing marker; out as the MCU sees it | |
GND |
passive | shared | GND |
/GND |
PWR_RETURN_LOCAL | ||
HV_DIAG_EN |
output | HV_DIAG_EN |
/HV_DIAG_EN |
MCU_FINE | GP14 |
36 V switch diagnostics enable⁵; out as the MCU sees it | |
HV_EN |
output | HV_EN |
/HV_EN |
MCU_FINE | GP19 |
36 V input switch enable; out as the MCU sees it | |
HV_LATCH |
output | HV_LATCH |
/HV_LATCH |
MCU_FINE | GP24 |
36 V switch latch-off select¹⁰; out as the MCU sees it | |
HV_SNS |
input | HV_SNS |
/HV_SNS |
MCU_FINE | GP28 |
36 V input load-current sense, R_SNS = 249 Ω; in as the MCU sees it |
|
PYC_UART_RX |
input | PYC_UART_RX |
/PYC_UART_RX |
MCU_FINE | GP1 |
UART RX from pyControl (UART0 RX); in as the MCU sees it |
|
PYC_UART_TX |
output | PYC_UART_TX |
/PYC_UART_TX |
MCU_FINE | GP0 |
UART TX to pyControl (UART0 TX); out as the MCU sees it |
|
TMC_DIAG0 |
input | TMC_DIAG0 |
/TMC_DIAG0 |
Default | GP5 |
Driver diagnostic 0; in as the MCU sees it, via the bus switch | |
TMC_DIAG1 |
input | TMC_DIAG1 |
/TMC_DIAG1 |
Default | GP8 |
Driver diagnostic 1; in as the MCU sees it, via the bus switch | |
TMC_SPI_CIPO |
input | TMC_SPI_CIPO |
/TMC_SPI_CIPO |
Default | GP4 |
Driver SPI CIPO (SPI0 RX); in as the MCU sees it, via the bus switch |
|
TMC_SPI_COPI |
output | TMC_SPI_COPI |
/TMC_SPI_COPI |
Default | GP7 |
Driver SPI COPI (SPI0 TX); out as the MCU sees it, via the bus switch |
|
TMC_SPI_SCK |
output | TMC_SPI_SCK |
/TMC_SPI_SCK |
Default | GP6 |
Driver SPI clock (SPI0 SCK); out as the MCU sees it, via the bus switch |
|
TQ_CAL_EN |
output | TQ_CAL_EN |
/TQ_CAL_EN |
Default | GP18 |
Torque calibration enable⁷; out as the MCU sees it, via the bus switch | |
TQ_CONVST_CS |
output | TQ_CONVST_CS |
/TQ_CONVST_CS |
Default | GP15 |
ADS8689 convert-start / frame, plain GPIO⁷; out as the MCU sees it, via the bus switch | |
TQ_SPI_CIPO |
input | TQ_SPI_CIPO |
/TQ_SPI_CIPO |
Default | GP12 |
Torque ADC SPI CIPO (SPI1 RX)⁷; in as the MCU sees it, via the bus switch |
|
TQ_SPI_COPI |
output | TQ_SPI_COPI |
/TQ_SPI_COPI |
Default | GP11 |
Torque ADC SPI COPI (SPI1 TX)⁷; out as the MCU sees it, via the bus switch |
|
TQ_SPI_SCK |
output | TQ_SPI_SCK |
/TQ_SPI_SCK |
Default | GP10 |
Torque ADC SPI clock (SPI1 SCK)⁷; out as the MCU sees it, via the bus switch |
|
USB_D+ |
bidirectional | USB_D+ |
/USB_D+ |
USB_HS | |||
USB_D- |
bidirectional | USB_D- |
/USB_D- |
USB_HS | |||
~{BRAKE_FAULT} |
input | ~{BRAKE_FAULT} |
/~{BRAKE_FAULT} |
Default | GP13 |
Brake block fault, active low⁷; in as the MCU sees it, via the bus switch | |
~{BUS_SW_EN}_INST |
output | ~{BUS_SW_EN}_INST |
/~{BUS_SW_EN}_INST |
INSTRUMENT | |||
~{HV_FAULT} |
input | ~{HV_FAULT} |
/~{HV_FAULT} |
MCU_FINE | GP23 |
36 V switch fault, open-drain, pull-up 3.3 V¹¹; in as the MCU sees it | |
~{TMC_CS} |
output | ~{TMC_CS} |
/~{TMC_CS} |
Default | GP2 |
Driver chip select; out as the MCU sees it, via the bus switch | |
~{TMC_DRV_EN} |
output | ~{TMC_DRV_EN} |
/~{TMC_DRV_EN} |
Default | GP3 |
Driver enable, active low; out as the MCU sees it, via the bus switch |
Blocks¶
The recipe's roles and the placements that fill them on this board.
| Role | Instance | Block | Lifecycle | Summary |
|---|---|---|---|---|
rp2040_with_gpio_isolation_sn74cb3q3245 |
rp2040_with_gpio_isolation_sn74cb3q3245 |
orb_weaver_private:rp2040_with_gpio_isolation_sn74cb3q3245 |
routed | RP2040 controller core and its GPIO isolation in one block: the full rp2040 core - W25Q128JVPIQ QSPI flash, 12 MHz ABM8 crystal, decoupling, BOOTSEL and RUN switches - plus four SN74CB3Q3245RGYR 8-channel bidirectional FET bus switches, with all 29 MCU-to-switch connections made inside the block so that routing is placed once instead of re-drawn per board. |
5v_to_3v3_tps73733_1 |
5v_to_3v3_tps73733_1 |
orb_weaver_private:5v_to_3v3_tps73733 |
routed | Clean 3.3 V linear regulator from a 5 V input rail using the TI TPS73733 fixed 3.3 V 1 A LDO. |
Glue¶
The subsystem's own parts and nets, drawn by the board around the blocks.
| References | Part | Value | Role |
|---|---|---|---|
R402, R403, R406, R407 |
OW-RES-4K7-0402 |
4.7k | pullup-pulldown |
R401, R404, R405 |
OW-RES-10K-0402 |
10k | pullup-pulldown |
R408, R409 |
OW-PASS-RC0402FR-071KL |
1k | |
R410, R411 |
OW-PASS-0402WGF1000TCE |
100 |
| Net | Kind | Pins | Meaning |
|---|---|---|---|
+3.3V_MCU |
port | R401.1, R402.1, R403.1 |
|
+3.3V_SW |
port | R406.1, R407.1, R408.1 |
|
DAC_SCL |
port | R406.2, R410.1 |
|
DAC_SCL_INST |
port | R410.2 |
|
DAC_SDA |
port | R407.2, R411.1 |
|
DAC_SDA_INST |
port | R411.2 |
|
FW_TRIG0 |
port | R404.1 |
|
FW_TRIG1 |
port | R405.1 |
|
GND |
port | R404.2, R405.2, R409.2 |
|
PYC_UART_RX |
port | R401.2 |
|
DAC_SCL_BYP |
label | R402.2 |
|
DAC_SDA_BYP |
label | R403.2 |
|
SW_RAIL_SENSE_DIV_2 |
label | R408.2, R409.1 |
Power flags: +5V_MCU.